The present invention relates to an image processing method and image processing circuit, and more particularly, to noise correction of image data in a solid state imaging device.
In the prior art, solid state imaging devices use solid state imaging elements such as charge couple device (CCD) image sensors and CMOS image sensors. Since the image data generated by solid state imaging devices may include defects such as vertical streaks due to the structure of the solid state imaging devices, it is required that such defects be reduced.
In solid state imaging devices that use CCD image sensors, a phenomenon unique to CCD image sensors occur in which a smear is produced when intense light enters the device. The smear reduces image quality. The smear occurs when charges that cannot be held in a charge accumulation region override a potential region and leak into a vertical transfer channel. When the charge leakage is caused by normal and stable light, a smear is produced during the entire vertical transfer period. Therefore, when there are light spots, for example, streaks are produced in the vertical direction.
Japanese Laid-Open Patent Publication No. 7-67038 describes a method for suppressing the smear phenomenon by making use of the smear generation principle in which a smear is produced at substantially the same level in the vertical direction. In this method, the output level of the image sensor in a vertical optical black region, which is shielded from light, is set as a reference, and the reference value is subtracted from a pixel value of an effective pixel region. More specifically, the image sensor is divided into an effective pixel region, which receives light, and an optical black region, which is shielded from light. A vertical optical black region is set as a black reference for the column direction from the optical black region, and the vertical optical black region is used as a smear detection region.
FIG. 1 is a schematic block diagram of an image processing circuit in the prior art. An image signal S from a CCD image sensor (solid state imaging element) is provided to a selection circuit 50. The selection circuit 50 divides the imaging signal S into an effective imaging signal SE, which is output from an effective pixel region, and a noise detection signal SD, which is output from the vertical optical black region. The selection circuit 50 provides the effective imaging signal SE to a calculator 51 and the noise detection signal SD to an integration circuit 52. The integration circuit 52 eliminates random noise from the noise detection signal SD through vertical integration (addition averaging) and stores the noise-eliminated signal SD in a line memory 53, which has a horizontal single-line segment capacity. The noise detection signal SD stored in the line memory 53 is provided to a low pass filter (LPF) processor 54. The LPF processor 54 eliminates noise components from the noise detection signal SD and provides the LPF-processed noise detection signal SD to the calculator 51. The calculator 51 subtracts the LPF-processed noise detection signal SD from the effective imaging signal SE of each horizontal line. In this manner, smear-corrected output image data is obtained.